PRELIMINARY INFORMATION
We are recognized around the world as a leading consulting company in the field of advanced semiconductor packaging technology.
Our goal is to enable our clients to compete more effectively by providing accurate, relevant, and timely information on technology trends and market developments.
We provide strategic market analysis, competitive analysis, technology trends, and evaluation of product strategies in the areas of semiconductor packaging and assembly, electronics manufacturing, and materials.
What sets TechSearch apart from others?
The Advanced Packaging Update (4 issues per year) features special coverage of market and technology developments for BGAs, CSPs, stacked die CSPs, flip chip, and wafer level packages. Each issue includes new applications, developments in materials and assembly equipment, and new package constructions.
Topics covered include:
In partnership with SEMI®, we offer a comprehensive report covering worldwide facilities that provide outsourced semiconductor assembly and testing manufacturing services. This database offers access and insights into global OSAT facilities in China, Taiwan, Korea, Japan, Southeast Asia, Europe, and the Americas. The report also highlights new and emerging package offerings by manufacturing location.
In partnership with SEMI®, we offer a comprehensive market research study that examines semiconductor packaging trends and their impact on the packaging materials markets. Markets are quantified, new opportunities are highlighted for advanced technology nodes and emerging package form factors, and the materials market outlook is presented.
In partnership with SavanSys Solutions, TechSearch International provides access to valuable cost models for packaging. SavanSys develops the models and we help to calibrate the data. Available are cost models for 2.5D and 3D packaging, flip chip, wafer level packaging, and wire bond applications. The 2.5D & 3D Packaging Cost Model is the first cost model to cover the total cost and yield from fabrication of the wafer to complete assembly. SavanSys also offers cost analysis for fan-out wafer level packaging.
TechSearch International's deep understanding of advanced packaging technologies is supported by teardowns of leading-edge system products. We perform our own teardowns and utilize third-party services of other experts. Information from the teardowns can be found throughout our line of reports. We also provide to clients individual teardown reports.
IEEE Frances B. Hugle Engineering Scholarship, established by IEEE and TechSearch International