Volume 2-0725

July 2025
order form
This second volume of the Advanced Packaging Update includes an analysis of OSAT financials. A special section is devoted to the demand for large substrates and developments in glass core substrates. Alternatives such as RDL interposers are described. Substrate material shortages are discussed. Thermal interface material needs for large body size packages are analyzed and new TIM 1 developments are included. TechSearch International’s annual survey on substrate design rules is presented, with special coverage of suppliers of laminate flip chip BGA and CSP substrates worldwide. The design rules include body size, core thickness, via and pad diameter, minimum bump pitch supported, and substrate finish.
  • Contents…
    •  1 Industry and Economic Trends
      • 1.1 Economic Outlook
        • 1.1.1 China's Economy
        • 1.1.2 U.S. Macroeconomic Trends
      • 1.2 Semiconductor Industry Trends
    • 2 OSAT Financial Analysis
      • 2.1 Market Overview
      • 2.2 OSAT Market Performance
      • 2.3 Company Highlights
        • 2.3.1 ASE Holdings
        • 2.3.2 Amkor Technology
        • 2.3.3 JCET Group
        • 2.3.4 Tongfu Microelectronics
        • 2.3.5 Powertech Technology
        • 2.3.6 Huatian
        • 2.3.7 UTAC
        • 2.3.8 KYEC
        • 2.3.9 ChipMOS
        • 2.3.10 Chipbond
      • 2.4 Outlook
    • 3 ​Substrate Developments
      • 3.1 Large Body Substrates
      • 3.2 Challenges for Larger Body Sizes
      • 3.3 Build-up Substrates with Bridges
      • 3.4 RDL Interposers
      • 3.5 Glass and Glass Core Substrates
        • 3.5.1 Company Activities
          • 3.5.1.1 Absolics
          • 3.5.1.2 AKM Meadville
          • 3.5.1.3 BOE
          • 3.5.1.4 Dai Nippon Printing
          • 3.5.1.5 FICT
          • 3.5.1.6 Intel
          • 3.5.1.7 LG Innotek
          • 3.5.1.8 Qorvo
          • 3.5.1.9 Samsung Electro-Mechanics
          • 3.5.1.10 Shinko Electric
          • 3.5.1.11 Sony
          • 3.5.1.12 Toppan
          • 3.5.1.13 Unimicron
        • 3.5.2 Research Consortia
          • 3.5.2.1 Fraunhofer IZM
        • 3.5.3 Challenges
        • 3.5.4 Progress on Glass
          • 3.5.4.1 TGV Fabrication
          • 3.5.4.2 Glass Cracking During Singulation
        • 3.5.5 Alternative Core Materials and Shortages
      • 3.6 Thermal Interface Materials Challenges
        • 3.6.1 TIM Supplier Developments
          • 3.6.1.1 Henkel
          • 3.6.1.2 Indium
          • 3.6.1.3 Namics
          • 3.6.1.4 Napra
          • 3.6.1.5 Resonac
    • ​​4 Substrate Design Rules
      • 4.1 Today’s Laminate Feature Size
      • 4.2 Company Design Rules
        • 4.2.1 ACCESS Semiconductor
        • 4.2.2 ASE Materials
        • 4.2.3 AT&S
        • 4.2.4 BRAI Technology
        • 4.2.5 Daeduck 
        • 4.2.6 Daisho Denshi
        • 4.2.7 FICT
        • 4.2.8 GS Swiss PCB
        • 4.2.9 Haesung DS
        • 4.2.10 Ibiden
        • 4.2.11 Kinsus Interconnect Technology
        • 4.2.12 Korea Circuit Company
        • 4.2.13 Kyocera International
        • 4.2.14 LG Innotek
        • 4.2.15 Meiko
        • 4.2.16 Nan Ya PCB Corporation
        • 4.2.17 R&D Altanova
        • 4.2.18 Samsung Electro–Mechanics
        • 4.2.19 Shennan Circuits
        • 4.2.20 Shinko Electric Industries
        • 4.2.21 Simmtech
        • 4.2.22 Toppan
        • 4.2.23 TTM Technologies
        • 4.2.24 Unimicron Technology Corporation
    • Appendix: Substrate Suppliers
    • References
  • Figures…
    • 1.1 Projected U.S. GDP.
    • 1.2 Monthly U.S. housing starts.
    • 3.1 Warpage control compensation layer.
    • 3.2 PIC integrated glass substrate.
  • Tables…
    • 2.1 Revised Top 20 Publicly Traded OSATs
    • 2.2 New Top 20 OSATs Quarterly Revenue
    • 2.3 Top 20 OSATs Quarterly Year-over-Year Revenue
    • 3.1 Large Body Packages
    • 3.2 Glass Core Substrate TV Demonstrations
    • 3.3 RDL on Glass Substrates
    • 3.4 Large Body Size Package Projections
    • 4.1 Selected Build-up Substrate Suppliers
    • 4.2 Selected Build-up FC-CSP Substrate Suppliers
    • 4.3 Design Rules for ACCESS FC-BGA Substrates
    • 4.4 Design Rules for ACCESS Coreless Substrates
    • 4.5 Design Rules for ACCESS FC-CSP Substrates
    • 4.6 Design Rules for ACCESS Wire Bond CSP Substrates
    • 4.7 Design Rules for ASE PBGA/CSP Substrates
    • 4.8 Design Rules for AT&S FC-PBGA Substrates
    • 4.9 Design Rules for BRAI FC-PBGA Substrates
    • 4.10 Design Rules for Daeduck FC-CSP/SiP Substrates
    • 4.11 Design Rules for Daeduck Thin WB Substrates
    • 4.12 Design Rules for Daeduck FC-PBGA Substrates
    • 4.13 Design Rules for Daisho Denshi PBGA/CSP Substrates
    • 4.14 Design Rules for FICT FC-PBGA Substrates
    • 4.15 Design Rules for Ibiden FC-PBGA Substrates
    • 4.16 Design Rules for Kinsus FC-PBGA Substrates
    • 4.17 Design Rules for Kinsus FC-CSP Substrates
    • 4.18 Design Rules for Kinsus PBGA/CSP Substrates
    • 4.19 Design Rules for Kinsus Coreless Substrates
    • 4.20 Design Rules for KCC FC-CSP Substrates
    • 4.21 Design Rules for KCC UT-CSP Substrates
    • 4.22 Design Rules for Kyocera FC-PBGA Substrates
    • 4.23 Design Rules for Kyocera FC-CSP Substrates
    • 4.24 Design Rules for LG Innotek CSP Substrates
    • 4.25 Design Rules for LG Innotek FC-CSP Substrates
    • 4.26 Design Rules for LGIT FC-PBGA Substrates
    • 4.27 Design Rules for Meiko FC-PBGA Substrates
    • 4.28 Design Rules for Meiko PCB PBGA Substrates
    • 4.29 Design Rules for Nan Ya PCB FC-PBGA Substrates
    • 4.30 Design Rules for Nan Ya PCB PBGA/CSP Substrates
    • 4.31 Design Rules for Nan Ya FC-CSP Substrates
    • 4.32 Design Rules for Nan Ya PCB FC-PBGA Coreless Substrates
    • 4.33 Design Rules for R&D Altanova FC-PBGA Substrates
    • 4.34 Design Rules for SEMCO FC-PBGA Substrates
    • 4.35 Design Rules for SEMCO PBGA/CSP Substrates
    • 4.36 Design Rules for SEMCO FC-CSP Substrates
    • 4.37 Design Rules for SCC PBGA/CSP Substrates
    • 4.38 Design Rules for Shinko Electric FC-BGA/LGA Substrates
    • 4.39 Design Rules for Shinko Electric FC-CSP Substrates
    • 4.40 Design Rules for Shinko Electric Coreless Substrates
    • 4.41 Design Rules for Simmtech PBGA/CSP Substrates
    • 4.42 Design Rules for Simmtech Coreless Substrates
    • 4.43 Design Rules for Toppan FC-PBGA Substrates
    • 4.44 Design Rules for CoreEZÒ Substrates
    • 4.45 Design Rules for HyperBGAÒ Substrate
    • 4.46 Design Rules for TTM FC-PBGA Substrates
    • 4.47 Design Rules for Unimicron FC-PBGA Substrates
    • 4.48 Design Rules for Unimicron FC-CSP Substrates
    • 4.49 Design Rules for Unimicron PBGA/CSP Substrates

Brochure Coming Soon

  • Published July 2025
  • 96 pages
  • 4 figures / 56 tables
  • 83 PowerPoint slides
  • $8,750 corporate license (4 issues)
Who We Are
TechSearch International is recognized around the world as a leading consulting company in the field of advanced semiconductor packaging and assembly, electronics manufacturing, and materials.
Network
Contact
  • email message
  • +1.512.372.8887
  • +1.512.372.8889
  • 4801 Spicewood Springs Rd, Ste 150
    Austin, TX 78759
    United States
Navigate
Copyright © 2015–2025 TechSearch International, Inc. • techsearchinc.com • all rights reserved