Volume 2-0723

July 2023
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This second volume of the Advanced Packaging Update includes an analysis of OSAT financials; AI packaging trends; die-to-wafer hybrid bonding applications and challenges; and an analysis of RF packaging trends. An updated analysis of build- up substrate supply and demand is presented, along with an assessment of alternatives such as glass core substrates. TechSearch International’s annual survey on substrate design rules is presented, with special coverage of suppliers of laminate flip chip BGA and CSP substrates worldwide. The design rules include body size, core thickness, via and pad diameter, minimum bump pitch supported, and substrate finish.
  • Contents…
    •  1 Industry and Economic Trends
      • 1.1 Economic Growth Slows
        • 1.1.1 China's Economy
        • 1.1.2 Trade Friction and Globalization
        • 1.1.3 U.S. Macroeconomic Trends
    • 2 OSAT Financial Analysis
      • 2.1 Market Overview
      • 2.2 OSAT Market Performance
      • 2.3 Company Highlights
        • 2.3.1 ASE Holdings
        • 2.3.2 Amkor Technology
        • 2.3.3 JCET Group
        • 2.3.4 Tongfu Microelectronics
        • 2.3.5 Powertech Technology
        • 2.3.6 Huatian
        • 2.3.7 UTAC
        • 2.3.8 KYEC
        • 2.3.9 Chipbond
        • 2.3.10 ChipMOS
      • 2.4 Outlook
    • 3 AI Packaging Trends
      • 3.1 AI Packages in Production
        • 3.1.1 NVIDIA
        • 3.1.2 AMD
        • 3.1.3 Baidu
        • 3.1.4 Broadcom
        • 3.1.5 Cerebrus
        • 3.1.6 Google
        • 3.1.7 IBM
        • 3.1.8 Intel
        • 3.1.9 Tesla
      • 3.2 Demand for Silicon Interposers
      • 3.3 Large Package Challenges and Alternatives
      • 3.4 Demand for HBM
    • 4 D2W Hybrid Bonding
      • 4.1 D2W Applications
        • 4.1.1 High-Performance Computing
          • 4.1.1.1 AMD
          • 4.1.1.2 Intel
          • 4.1.1.3 IBM
        • 4.1.2 High Bandwidth Memory
          • 4.1.2.1 SK hynix
          • 4.1.2.2 Samsung
          • 4.1.2.3 Micron
        • 4.1.3 Memory on Logic
        • 4.1.4 CMOS Image Sensors
        • 4.1.5 Challenges and Solutions
    • 5 RF Packaging Trends
      • 5.1 RF Front-End Module Trends
      • 5.2 Fan-out for RF Modules
        • 5.2.1 Fraunhofer
        • 5.2.2 CEA-Leti
        • 5.2.3 IME
        • 5.2.4 nepes
      • 5.3 Glass Options for RF
        • 5.3.1 Georgia Tech
        • 5.3.2 Foxconn
        • 5.3.3 Korean Electronic Technology Institute
        • 5.3.4 3D Glass Solutions
        • 5.3.5 Mosaic Microsystems
        • 5.3.6 Samtec
    • 6 Substrate Supply and Demand
      • 6.1 FC-BGA Supply and Demand
    • 7 New Substrate Developments
      • 7.1 Glass Core Substrates
        • 7.1.1 Absolics
        • 7.1.2 Intel
        • 7.1.3 Dai Nippon Printing
        • 7.1.4 Unimicron
      • 7.2 Advantages and Challenges
        • 7.2.1 Via Formation
        • 7.2.2 Singulation
        • 7.2.3 Board Level Reliability
    • ​8 Substrate Design Rules
      • 8.1 Today's Laminate Feature Size
      • 8.2 Company Design Rules
        • 8.2.1 ACCESS Semiconductor
        • 8.2.2 ASE Materials
        • 8.2.3 AT&S
        • 8.2.4 Daeduck
        • 8.2.5 Daisho Denshi
        • 8.2.6 FICT
        • 8.2.7 Haesung DS
        • 8.2.8 Ibiden
        • 8.2.9 Kinsus Interconnect Technology
        • 8.2.10 Korea Circuit Company
        • 8.2.11 Kyocera International
        • 8.2.12 LG Innotek
        • 8.2.13 Nan Ya PCB
        • 8.2.14 R&D Altanova
        • 8.2.15 Samsung Electro-Mechanics
        • 8.2.16 Shennen Circuits
        • 8.2.17 Shinko Electric Industries
        • 8.2.18 Simmtech
        • 8.2.19 Toppan Printing
        • 8.2.20 TTM Technologies
        • 8.2.21 Unimicron Technology
  • Appendix: Substrate Suppliers
  • References
  • Figures…
    • 1.1 Monthly U.S. housing starts.
    • 3.1 IBM Z16 dual chip module on organic substrate.
    • 3.2 Thermo-mechanical stress with large package.
    • 3.3 Substrate crack paths.
    • 4.1 AMD 3D V-Cache™ using TSMC's SoIC™.
    • 4.2 Intel Quasi-Monolithic Chips.
    • 5.1 Board area requirements for RF FEMs in smartphones.
    • 5.2 Broadcom AFEM-8231 HB/MB FEM.
    • 5.3 Murata UHB diversity switch module with ceramic filters.
    • 7.1 Glass interposer with Cu bridge.
    • 7.2 Factors affecting stress of glass.
  • Tables…
    • 2.1 Top 20 OSATs Quarterly Revenue
    • 3.1 Relative High-Performance Attributes
    • 3.2 Market Projections for Interposers
    • 3.3 Suppliers of Si Interposers
    • 3.4 HBM Market Projections
    • 5.1 RF FEM Trends in Apple iPhone Pro
    • 5.2 RF FEM Trends in Samsung Galaxy S Series
    • 5.3 RF FEM Examples
    • 6.1 FC-BGA Substrate Supply and Demand
    • 6.2 FC-BGA Demand for High Layer Count Substrates
    • 8.1 Build-up Substrate Features
    • 8.2 Selected Build-up FC-PBGA Substrate Suppliers 
    • 8.3 Selected Build-up FC-CSP Substrate Suppliers 
    • 8.4 Design Rules for ACCESS FC-BGA Substrates
    • 8.5 Design Rules for ACCESS Coreless Substrates
    • 8.6 Design Rules for ACCESS FC-CSP Substrates
    • 8.7 Design Rules for ACCESS Wire Bond CSP Substrates
    • 8.8 Design Rules for ASE PBGA/CSP Substrates
    • 8.9 Design Rules for AT&S FC-PBGA Substrates
    • 8.10 Design Rules for Daeduck FC-CSP/SiP Substrates
    • 8.11 Design Rules for Daeduck Thin WB Substrates
    • 8.12 Design Rules for Daeduck FC-PBGA Substrates
    • 8.13 Design Rules for Daicho Denshi PBGA/CSP Substrates
    • 8.14 Design Rules for FICT FC-PBGA Substrates
    • 8.15 Design Rules for Ibiden FC-PBGA Substrates
    • 8.16 Design Rules for Kinsus FC-PBGA Substrates
    • 8.17 Design Rules for Kinsus FC-CSP Substrates
    • 8.18 Design Rules for Kinsus PBGA/CSP Substrates
    • 8.19 Design Rules for Kinsus Coreless Substrates
    • 8.20 Design Rules for KCC FC-CSP Substrates
    • 8.21 Design Rules for KCC UT-CSP Substrates
    • 8.22 Design Rules for Kyocera FC-PBGA Substrates
    • 8.23 Design Rules for Kyocera FC-CSP Substrates
    • 8.24 Design Rules for LG Innotek CSP Substrates
    • 8.25 Design Rules for LG Innotek FC-CSP Substrates
    • 8.26 Design Rules for LGIT FC-PBGA Substrates
    • 8.27 Design Rules for Nan Ya PCB FC-PBGA Substrates
    • 8.28 Design Rules for Nan Ya PCB PBGA/CSP Substrates
    • 8.29 Design Rules for Nan Ya PCB FC-CSP Substrates
    • 8.30 Design Rules for Nan Ya PCB FC-PBGA Coreless Substrates
    • 8.31 Design Rules for R&D Altanova FC-PBGA Substrates
    • 8.32 Design Rules for SEMCO FC-PBGA Substrates
    • 8.33 Design Rules for SEMCO PBGA/CSP Substrates
    • 8.34 Design Rules for SEMCO FC-CSP Substrates
    • 8.35 Design Rules for SCC PBGA/CSP Substrates
    • 8.36 Design Rules for Shinko Electric FC-PBGA Substrates
    • 8.37 Design Rules for Shinko Electric FC-CSP Substrates
    • 8.38 Design Rules for Shinko Electric Coreless Substrates
    • 8.39 Design Rules for Simmtech PBGA/CSP Substrates
    • 8.40 Design Rules for Simmtech Coreless Substrates
    • 8.41 Design Rules for Toppan FC-PBGA Substrates
    • 8.42 Design Rules for CoreEZ® Substrates
    • 8.43 Design Rules for HyperBGA® Substrates
    • 8.44 Design Rules for TTM FC-PBGA Substrates
    • 8.45 Design Rules for Unimicron FC-PBGA Substrates
    • 8.46 Design Rules for Unimicron FC-CSP Substrates
    • 8.47 Design Rules for Unimicron PBGA/CSP Substrates
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  • Published July 2023
  • 109 pages
  • 11 figures / 57 tables
  • 97 PowerPoint slides
  • $8,750 corporate license (4 issues)
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