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Flip Chip Markets and Infrastructure Developments

Flip chip has expanded in two major areas—one driven by the high performance needs of the microprocessor, ASIC, and high-end DSP devices, the other driven by form factor where die sizes are small and packaging cost must be as minimal as the package itself. What’s new in flip chip technology is its expansion into the interconnect realm previously dominated by wire bond. It is the potential expansion of flip chip into the mid-range pin counts that represents a shift in the adoption of the technology, improvements in the industry infrastructure, and a maturing of the industry—reflected in cost reductions. Another new development is the introduction of wafer level packages (WLPs).

Major improvements over the last four years have removed or reduced many barriers to the expansion of flip chip. For many companies the key to the expanded use of flip chip has been the availability of low-cost wafer bumping. Prices from service providers have declined and the number of wafer bumping foundries has increased from just a few to more than a dozen. Bumped die can be fabricated using a number of methods and materials, including gold, gold stud bump, electroless nickel/gold, and solder. In keeping with the environmentally friendly marketing movement, many merchant bumping operations have introduced or have R&D activities for lead-free bumping methods, and some products using lead-free bumps have been introduced. The report looks at the

  • Growth in flip chip not only in the number of die, but also the number of wafers
  • Bumping capacity and projections for supply and demand in number of wafers. Both gold and solder bumping are examined.
  • Companies with flip chip bonders
  • Bump inspection systems
  • Underfill materials with shorter cure times and improved properties
  • Microvia technology in organic substrates developed for high density routing
  • Contract assembly operations
  • Flip chip market by application, including chip on glass and chip on flex for displays using gold bumps, stud bump bonded die in packages and on flex circuit, and solder bumped ICs packaged as flip chip in package (FCIP) and flip chip on board (FCOB).
Q1, 2002 BGA CSP report Flip Chip Markets and Infrastructure Developments
File size: 89.1 kb Published: May 2001.

Table of Contents
1 What’s New in Flip Chip
1.1 Drivers for the Expanded Use of Flip Chip
1.2 Flip Chip vs. Wafer Level Packaging
1.3 Wires vs. Bumps
1.4 Barriers to the Expanded Use of Flip Chip
1.4.1 Testing of Bumped Die
1.4.2 Flip Chip Design
   
2 Flip Chip Applications
2.1 Computers and Computer Peripherals
2.1.1 High-end Computers
2.1.2 Workstations/Servers
2.1.3 Personal Computers
2.1.4 Hard Disk Drives
2.2 Telecommunications
2.2.1 Switching, Transmission, Network Systems
2.2.2 Optoelectronics
2.2.3 Wireless Products
2.3 Consumer Products
2.4 Displays
2.5 Smart Cards, RF ID, and EAS Tags
2.6 Medical
2.7 Automotive Electronics
   
3 Flip Chip Market Projections
3.1 Wafer Bump Capacity
3.2 Flip Chip Demand
3.2.1 Solder Bumping Market Projections
3.2.2 Gold Bumping Market Projections
3.2.3 FCIP vs. FCOB for Solder Bumping
   
4 Wafer Bumping
4.1 Wafer Bumping Options
4.1.1 Solder Bumps
4.1.1.1 Under Bump Metallurgy
4.1.1.2 Wafer Passivation
4.1.1.3 Solder Application
4.1.1.4 Solder Composition
4.1.1.5 Redistribution
4.1.2 Plated Gold Bumps
4.1.2.1 Electrolytic Gold Plating
4.1.2.2 Electroless Ni/Au Plating
4.1.3 Stud Bump Formation
4.1.4 Polymer Bumps
4.2 Wafer Bumping Service Providers
Advanpack Solutions, APack, Aptos, Casio Micronics, Chipbond Technology, Citizen Watch, EM Marin, Fujitsu Tohoku, FuPo, IC Interconnect, K&S Flip Chip Div. (FCT), MEGIC, MicroFab Technology, MicroScale, Pac Tech, Polymer Flip Chip, Unitive Electronics
5 Substrate Developments
5.1 Ceramic Substrates
5.2 Flex Circuit Substrates
5.3 Laminate Substrates for IC Packages
5.4 Microvia Substrate Supplier Developments
Compeq, CMK, D.T. Circuit, Fujitsu, Hitachi, Ibiden, IBM, JCI, JVC, K&S, Kinsus Interconnect, Kyocera, Matsushita, Mitsui Chemicals, NanYa Technology, NTK, Shinko Electric, 3M, Toppan5.5 Flip Chip Laminate Price Trends
6 Flip Chip Assembly and Inspection
6.1 Flip Chip Placement Equipment
6.1.1 Bump Pitch Drives Bonder Selection
6.1.1.1 Accuracy
6.1.1.2 Joining Processes
6.1.1.3 Considerations for FCIP and FCOB
6.1.1.4 Development Systems
6.1.1.5 Placement from 300mm Wafers
6.1.2 Production Placement Equipment
Alphasem, Assembleon, Datacon/K&S, ESEC, Fuji Machine, Hitachi Tokyo Electronics, ITO Corp./Ohashi, Karl Suss, KME, MRSI, Misuzu FA, MYDATA, Palomar, Panasonic FA, Quad Systems, RD Automation, Shibaura Mechatronics, Shibuya Kogyo, Siemens, Toray Engineering, Towa, Universal Instruments
6.2 Underfill Dispense Equipment
6.3 Wafer Bump Inspection
   
7 Underfill Materials
7.1 The Need for Underfill
7.2 Underfill Requirements
7.2.1 Underfill for Flip Chip
7.2.2 Underfill for CSPs
7.3 New Developments in Underfill Materials
7.3.1 Pre-dispensed (No-Flow) Underfill
7.3.2 Reworkable Underfills
7.3.3 Snap-Cure Underfill
7.4 Underfill Materials Suppliers and Market Trends
7.4.1 Key Suppliers
7.4.2 Key Users
7.4.3 Trend Toward Industry Consolidation
8 Contract Assembly Services
List of Figures
1. Merchant gold bump capacity projections.
2. Solder and electroless Ni/Au bump capacity.
3. Flip chip market growth by application (2001 to 2005).
2.1. LSI Logic’s packaging roadmap.
2.2. Flip chip bumped fast SRAM.
2.3. Fujitsu’s lead-free bumped die and module.
2.4. 400 and 700 MHz Transmeta processors.
2.5. Seagate HDD with flip chip.
2.6. Flip chip devices for HDD.
2.7. IBM’s 2,577 I/O CCGA.
2.8. Motorola’s flip chip PBGA.
2.9. Laser diode mounting using flip chip passive alignment.
2.10. 40 Gbps optical receiver module developed by NTT.
2.11. NTT photo diode flip chip mounted on an amplifier waveguide.
2.12. Battery controller chip with precision resistor.
2.13. National Semiconductor’s µSMD.
2.14. Amkor’s fsCSP.
2.15. Motorola’s boards for flip chip.
2.16. Ericsson’s Bluetooth module.
2.17. Lucent’s Bluetooth module.
2.18. SBB applications.
2.19. TAB tape.
2.20. COG assembly.
2.21. COF.
2.22. Display with driver COF.
2.23. RF ID tag.
2.24. Cross section of electroless Ni/Au bump.
2.25. Valtronic hearing aid.
2.26. Denso’s flip chip bump.
2.27. Delphi’s flip chip module.
3.1. Merchant and captive solder bump capacity.
3.2. Merchant gold bump capacity.
3.3 Demand for solder bumped wafers (FC and WLPs).
3.4. Demand for gold bumped wafers.
3.5. SBB demand projection.
3.6. FCIP and FCOB projections for solder bumped die.
4.1. IBM’s C4 evaporation process.
4.2. Electroplated solder bump process.
4.3. Gold wafer bumping process.
4.4. Electroless Ni/Au plating.
4.5. Stud bump formation.
4.6. Bump leveling and assembly for stud bump process.
4.7. Polymer bump process flow.
5.1. Flip chip bump pitch trends.
5.2. AMITEC cross section
5.3. IBM’s HyperBGA‘ mounted on a board.
6.1. Equipment emphasis of flip chip market segments.
6.2. Flip chip bonder performance.
6.3. Flip chip assembly process flows.
6.4. FineTech manual flip chip bonder with split optics.
6.5. Ohashi FCS902 semiautomatic ACF bonder.
6.6. Air-Vac’s Onyx-32.
6.7. Integrated reflow furnace takes up less floor space.
6.8. Alphasem module picks and flips die from vertical wafer.
6.9. The Assembléon ACM Advanced Component Mounter.
6.10. K&S markets the Datacon 2200 as the APM 2200.
6.11. Multiple 2200 systems configured to increase production.
6.12. ESEC’s 2008xP and Micron 2.
6.13. The Karl Suss FC250 precision flip chip bonder.
6.14. The KME Create KME FB35W-M and FB50W-M.
6.15. The MRSI 505 flip chip bonder.
6.16. The Misuzu FA CB-1750 flip chip bonder.
6.17. The MYDATA MY9 fine-pitch placer.
6.18. The Panasert FCB2, MPAV2 and MSF.
6.19. The Quad APS-1H Advanced Placement System.
6.20. RD Automation CDB-50ST high precision flip chip bonder.
6.21. Shibaura Mechatronics TFC-1000 high-speed flip chip bonder.
6.22. The Shibuya DB300 and DB500 flip chip bonder.
6.23. DB-300 Flux application by stamping or dipping.
6.24. The Siemens SiPlace 80 F5 placement system.
6.25. Toray flip chip bonders.
6.26. Towa FC-B flip chip bonder.
6.27.  Universal’s GSM-x and GSM-xs placement systems.
6.28 Universal’s flexible LED illumination module.
8.1. ASE’s flip chip roadmap.
8.2. SPIL’s flip chip assembly roadmap.

List of Tables
1. Worldwide Merchant Wafer Bumping Services
2. Demand for Gold Bumping
3. Demand for Solder Bumping
4. Solder Bumped WLP Forecast
1.1. Bumped Wafer Level Packages in Volume Production
2.1. Flip Chip Applications
2.2. Flip Chip ICs in High Performance IBM Systems
2.3. Packaging for NEC’s SX-5 Supercomputer
2.4. Current and Future PowerPC Products
2.5. LSI Logic’s Low Cost Flip Chip (FPBGA-4L) Package Family
2.6. Drivers for Flip Chip in Optoelectronics Packaging
2.7. COG Mounting Technology
3.1. Solder and Electroless Ni/Au Capacity Projections
3.2. Flip Chip Market by Application (millions of units)
3.3. Demand for Solder Bumped ICs
3.4. Bumped Wafer Level Packages
3.5. Demand for Gold Bumped ICs
4.1. Applications for Different Bump Types
4.2. Today’s Selected Merchant Wafer Bumping Capacity
5.1. Alumina and Glass Ceramic Substrate Properties
5.2. Selected Laminate IC Package Substrate Suppliers
5.3. SLC Roadmap.
5.4. Feature Sizes and Roadmap for Kinsus Technology Substrates
6.1. Precision vs Cycletime: Machine Characteristics.
6.2. Development and Low Volume Flip Chip Bonders
6.3. Flip Chip Placement Equipment Suppliers
6.4. Ohashi Process Equipment for LCD Module Assembly
6.5. Underfill Dispense System Suppliers
6.6. Automatic Wafer Bump Inspection Systems
7.1. Requirements of Underfill Encapsulants
7.2. Properties of Three Bond 2271B CSP Underfill
7.3. Suggested Cure Schedule for E&C 1172
7.4. Key Underfill Suppliers
7.5. Typical Underfill Use for Microprocessor
7.6. Typical Underfill Use for Two Die
7.7. Underfill Market Estimate
8.1. Amkor’s Flip Chip Offerings
8.2. Flip Chip Package Assembly Suppliers
8.3.  Flip Chip Board Level Assembly Suppliers


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