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ADVANCED PACKAGING UPDATE:
Market and Technology Trends
Vol. 1-010

This volume of the Advanced Packaging Update features special coverage of the developments in silicon interposers. Silicon substrates and interposers have been explored many times over the last 20 years, but never met expectations. With the impetus of through-silicon via (TSV) development, they are being considered again. This report evaluates the market for silicon interposers and discusses how the technology has developed so that they may be more successful this time. Information from suppliers of interposers, users, and assembly houses is included in the report. The report also examines economic trends and the impact on the semiconductor industry. IC package subcontractors are reporting increased capacity utilization. Plans for CAPEX spending in 2010 are compared with actual 2009 expenditures.

	Advanced Packaging Update: Market and Technology Trends Vol. 1-010
File size: 83.2kb		Published: June 2010.

Table of Contents
1	Industry and Economic Trends
1.1	Economic Trends
1.2	Semiconductor Growth
2	Silicon Substrates and Interposers
2.1	History
2.1.1	Advantages of Silicon Substrates
2.1.2	Challenges of the Previous Technology
2.2	Market Projections
2.2.1	Drivers and Applications
2.2.2	Timeframe
2.2.3	Supply Chain
2.3	Technology
2.3.1	Interposer Dimensions
2.3.2	Interconnect and Via Materials
2.3.3	Passives
2.3.4	Challenges of the New Technology
2.4	Company Activities
2.4.1	ALLVIA
2.4.2	Altera
2.4.3	Amkor
2.4.4	ASE
2.4.5	Dai Nippon Printing
2.4.6	Ibiden
2.4.7	IBM Corporation
2.4.8	IPDiA
2.4.9	LSI Corporation
2.4.10	NEPES Corporation
2.4.11	Powertech Technology, Inc.
2.4.12	Shinko Electric Industries Co., Ltd.
2.4.13	Silex Microsystems AB
2.4.14	STATS ChipPAC
2.4.15	Taiwan Semiconductor Manufacturing Company, Ltd.
2.4.16	Xilinx
	Appendix: Silicon Interposer Suppliers
	References

List of Figures
1.1.	Monthly U.S. housing starts.
2.1.	MCM graveyard – a cautionary tale.
2.2.	Silicon interposer test vehicle.
2.3.	DNP's silicon interposer.
2.4.	Test vehicles for IBM reliability testing.
2.5.	Conceptual view of IBM's OE module with silicon interposer.
2.6.	Top (a) and cross-sectional (b) views of IBM's seven-bar TSV.
2.7.	IPDiA's silicon interposer.
2.8.	Cross-sectional view of trench capacitor.
2.9.	Interposer structure.
2.10.	Roadmap for TSV and silicon interposer.
2.11.	Shinko's Trenched Air Gap (TAG) around the TSV.
2.12.	TAG used for loss characterization.
2.13.	Flip chip die on TSV interposer.

List of Tables
1.1.	CAPEX Growth (millions of dollars)
2.1.	Silicon Interposer Market Projections (millions of units)
2.2.	Specifications of Silicon Interposers under Evaluation
2.3.	Specifications of DNP's Standard Silicon Interposer
2.4.	Properties of Silicon Interposer Stack for Reliability Testing
2.5.	Effect of Silicon Resistivity and TAG on Insertion Loss
2.6.	Effect of Substrate Material and Thickness on Die Stress