- 1.1 Monthly U.S. housing starts.
- 3.1 Hybrid FC-CSP versus MUST.
- 3.2 Fingerprint sensor in panel FO-WLP.
- 4.1 Modules of the Face ID system in iPhone X.
- 4.2 Cross-section of TriLumina's VCSEL array structure.
- 5.1 Waveguide propagation loss as a function of wafer process.
- 5.2 QSFP module and cut-away showing module board.
- 5.3 Bandwidths at various interfaces of a package on a PCB.
- 5.4 IMEC's optical module on a silicon photonics interposer.
- 5.5 Dragonfly™ mid-board optical module.
- 5.6 Silicon photonics package evolution at PETRA.
- 5.7 Prototype sub-system with PETRA's optical I/O cores.
- 5.8 Silicon photonics transceiver chip and I/O core cross-sections.
- 5.9 Side and top view of 8° oblique cone-shaped optical pin array.
- 5.10 Optical I/O core receiver with electrical and optical I/O.
- 5.11 Hybrid optical/electrical package substrate with polymer waveguides.
- 5.12 PIC integrated with bridge assembly.
- 5.13 Edge coupling optical fiber interconnects.
- 5.14 Grating coupling optical fiber interconnects.
- 5.15 100Gbps silicon photonics chipset in QSFP module.
- 5.16 Chip-on-chip and Chip on-wafer.
- 5.17 200Gbps silicon photonics chipset in embedded module.
- 5.18 GLOBALFOUNDRIES silicon photonics foundry roadmap.
- 5.19 Flip chip CMOS/silicon photonics interposer.
- 5.20 IBM parallelized fiber array assembly.
- 5.21 IBM compliant polymer interface.
- 5.22 Self-aligned photonic flip chip assembly.
- 5.23 Silicon photonics compared to an InP PIC.
- 5.24 Infinera's ICE5 optical engine with two InP PIC modules.
- 5.25 Infinera's ICE6 optical engine with co-packaged DSP and PIC.
- 5.26 Intel's hybrid silicon laser.
- 5.27 Lightwave Logic's photonics product roadmap.
- 5.28 Luxtera transceiver manufacturing and test flow.
- 5.29 Light source assembly including laser diode, ball lens, and
Faraday rotator. - 5.30 Luxtera's concept for ASIC/transceiver integration.